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trisquel-icecat/icecat/third_party/rust/any_all_workaround
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Ark74 618c9f4145 icecat: add release 140.3.1-1gnu1
2025-10-06 02:35:48 -06:00
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src icecat: initial release for Trisquel 12.0, Ecne 2025-07-17 09:32:21 -06:00
.cargo-checksum.json icecat: add release 140.3.1-1gnu1 2025-10-06 02:35:48 -06:00
build.rs icecat: initial release for Trisquel 12.0, Ecne 2025-07-17 09:32:21 -06:00
Cargo.lock icecat: add release 140.3.1-1gnu1 2025-10-06 02:35:48 -06:00
Cargo.toml icecat: add release 140.3.1-1gnu1 2025-10-06 02:35:48 -06:00
LICENSE-APACHE icecat: initial release for Trisquel 12.0, Ecne 2025-07-17 09:32:21 -06:00
LICENSE-MIT icecat: initial release for Trisquel 12.0, Ecne 2025-07-17 09:32:21 -06:00
LICENSE-MIT-QCMS icecat: initial release for Trisquel 12.0, Ecne 2025-07-17 09:32:21 -06:00
README.md icecat: initial release for Trisquel 12.0, Ecne 2025-07-17 09:32:21 -06:00

README.md

any_all_workaround

This is a workaround for bad codegen (Rust bug, LLVM bug) for the any() and all() reductions for NEON-backed SIMD vectors on 32-bit ARM. On other platforms these delegate to any() and all() in core::simd.

The plan is to abandon this crate once the LLVM bug is fixed or core::simd works around the LLVM bug.

The code is forked from the packed_simd crate.

This crate requires Nightly Rust as it depends on the portable_simd feature.

License

MIT OR Apache-2.0, since that's how packed_simd is licensed. (The ARM intrinsics Rust version workaround is from qcms, see LICENSE-MIT-QCMS.)